A noise-shaping accelerometer interface circuit for two-chip implementation

نویسندگان

  • T. Kajita
  • Un-Ku Moon
  • Gabor C. Temes
چکیده

This paper introduces a new architecture for sensor interface circuits using a delta-sigma modulator. The three-level force feedback allows the use of a digital compensator to stabilize the loop. A 3rd-order delta-sigma structure shapes the opamp noise and allows two-chip implementation with high loop gain at low frequencies.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

IEEE Instrumentation and Measurement Technology Conference Budapest Hungary May A Noise Shaping Accelerometer Interface Circuit for Two Chip Implementation

A proposed third order noise shaping accelerometer interface circuit enhances the SNR compared with the previ ously presented interface circuits The solution for the two chip implementation is described and a novel cross coupled CDS integrator is proposed This scheme functions even with the large parasitic capacitances between the sensor and the interface circuit The op amp noise is rst order s...

متن کامل

A two-chip interface for a MEMS accelerometer

A proposed third-order noise-shaping accelerometer interface circuit enhances the signal-to-noise ratio, compared with previously presented interface circuits. The solution for the two-chip implementation is described and a novel cross-coupled correlated double sampling integrator is proposed. This scheme functions even with large parasitic capacitances between the sensor and the interface circ...

متن کامل

Guaranteed recall of all training pairs for exponential bidirectional associative memory - Electronics Letters

1 ENZ, c.c., and TEMES, G.C : 'Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization', Proc. IEEE, 1996, 84, pp. 1584-1614 2 KAJITA, T. , MOON, U,-K., and TEMES, G.C.: 'A noise-shaping accelerometer interface circuit for two-chip implementation'. IEEE ISCAS 2000, May 2000, pp. IV-337-IV-340 3 STEENSGAARD, I.: 'Clo...

متن کامل

A 21.2μA -Based Interface ASIC for a Capacitive 3-Axis Micro-Accelerometer

In this paper, a micropower interface IC for a capacitive 3-axis micro-accelerometer implemented in a 0.25 -μm CMOS process is presented. The fully-integrated sensor interface consists of a sensor front-end that converts the acceleration signal into the digital domain, a decimator, a frequency reference, a clock generator for the front-end, a voltage and current reference, the required referenc...

متن کامل

A Micropower -Based Interface ASIC for a Capacitive 3-Axis Micro-Accelerometer

In this paper, a micropower interface IC for a capacitive 3-axis micro-accelerometer is presented. The IC is implemented in a 0.25m CMOS process. The fully-integrated sensor interface is based on a sensor front-end that operates mechanically in an open-loop configuration and converts the acceleration signals directly into the digital domain, thus avoiding the use of separate analog-to-digital c...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2000